Fixed reference frame phase-locked loop (FRF-PLL) for unbalanced line voltage conditions

dc.contributor.author	Escobar Valderrama, Gerardo
dc.contributor.author	Torres Olguín, Raymundo Enrique
dc.contributor.author	Martínez Montejano, Misael Francisco
dc.date.accessioned	2018-06-08T23:34:38Z
dc.date.available	2018-06-08T23:34:38Z
dc.date.issued	2008-10
dc.identifier.uri	http://hdl.handle.net/11627/3955
dc.description.abstract	"The present invention relates to a system to implement a phase-locked loop (PLL) which is able to provide an estimation of the angular frequency, and both the positive and negative sequences of the fundamental component of a three-phase signal. These sequences are provided in fixed reference frame coordinates."
dc.rights	Attribution-NonCommercial-NoDerivatives 4.0 Internacional
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/4.0/
dc.subject	G01R25/00
dc.subject	G06F19/00
dc.subject	H03L7/08
dc.subject.classification	MATEMÁTICAS
dc.title	Fixed reference frame phase-locked loop (FRF-PLL) for unbalanced line voltage conditions
dc.type	patente
dc.rights.access	Acceso Abierto

Except where otherwise noted, this item's license is described as Attribution-NonCommercial-NoDerivatives 4.0 Internacional