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Fixed reference frame phase-locked loop (FRF-PLL) for unbalanced line voltage conditions

dc.contributor.authorEscobar Valderrama, Gerardo
dc.contributor.authorTorres Olguín, Raymundo Enrique
dc.contributor.authorMartínez Montejano, Misael Francisco
dc.date.accessioned2018-06-08T23:34:38Z
dc.date.available2018-06-08T23:34:38Z
dc.date.issued2008-10
dc.identifier.urihttp://hdl.handle.net/11627/3955
dc.description.abstract"The present invention relates to a system to implement a phase-locked loop (PLL) which is able to provide an estimation of the angular frequency, and both the positive and negative sequences of the fundamental component of a three-phase signal. These sequences are provided in fixed reference frame coordinates."
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/
dc.subjectG01R25/00
dc.subjectG06F19/00
dc.subjectH03L7/08
dc.subject.classificationMATEMÁTICAS
dc.titleFixed reference frame phase-locked loop (FRF-PLL) for unbalanced line voltage conditions
dc.typepatente
dc.rights.accessAcceso Abierto


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