Set-reset flip-flop circuit with a simple output logic

dc.contributor.author	Campos Cantón, Isaac
dc.contributor.author	Campos Cantón, Eric
dc.contributor.author	Rosu Barbus, Haret-Codratian
dc.contributor.author	Castellanos Velasco, Ernesto
dc.contributor.editor	Springer
dc.date.accessioned	2018-03-21T23:42:20Z
dc.date.available	2018-03-21T23:42:20Z
dc.date.issued	2012
dc.identifier.citation	Campos-Cantón, I., Campos-Cantón, E., Rosu, H.C. et al. Circuits Syst Signal Process (2012) 31: 753.
dc.identifier.uri	http://hdl.handle.net/11627/3461
dc.description.abstract	"The equation of the plane (EOP) in analytic geometry is used to build a logic dynamic architecture, i.e., a combination of set-reset flip-flop (SR-FF) and basic logic gates. This is achieved by using two of the variables in the EOP as the input signals of the SR-FF and the remaining variable as the output signal. This theoretical proposal for mixing the SR-FF and the basic logic gates is confirmed experimentally by means of a simple electronic implementation."
dc.rights	Attribution-NonCommercial-NoDerivatives 4.0 Internacional
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/4.0/
dc.subject	Set-reset flip-flop
dc.subject	Equation of the plane
dc.subject	Basic logic gates
dc.subject	Bistable multivibrator
dc.subject.classification	CIENCIAS FÍSICO MATEMÁTICAS Y CIENCIAS DE LA TIERRA
dc.title	Set-reset flip-flop circuit with a simple output logic
dc.type	article
dc.identifier.doi	https://doi.org/10.1007/s00034-011-9343-4
dc.rights.access	Acceso Abierto

Except where otherwise noted, this item's license is described as Attribution-NonCommercial-NoDerivatives 4.0 Internacional