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Set-reset flip-flop circuit with a simple output logic

dc.contributor.authorCampos Cantón, Isaac
dc.contributor.authorCampos Cantón, Eric
dc.contributor.authorRosu Barbus, Haret-Codratian
dc.contributor.authorCastellanos Velasco, Ernesto
dc.contributor.editorSpringer
dc.date.accessioned2018-03-21T23:42:20Z
dc.date.available2018-03-21T23:42:20Z
dc.date.issued2012
dc.identifier.citationCampos-Cantón, I., Campos-Cantón, E., Rosu, H.C. et al. Circuits Syst Signal Process (2012) 31: 753.
dc.identifier.urihttp://hdl.handle.net/11627/3461
dc.description.abstract"The equation of the plane (EOP) in analytic geometry is used to build a logic dynamic architecture, i.e., a combination of set-reset flip-flop (SR-FF) and basic logic gates. This is achieved by using two of the variables in the EOP as the input signals of the SR-FF and the remaining variable as the output signal. This theoretical proposal for mixing the SR-FF and the basic logic gates is confirmed experimentally by means of a simple electronic implementation."
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/
dc.subjectSet-reset flip-flop
dc.subjectEquation of the plane
dc.subjectBasic logic gates
dc.subjectBistable multivibrator
dc.subject.classificationCIENCIAS FÍSICO MATEMÁTICAS Y CIENCIAS DE LA TIERRA
dc.titleSet-reset flip-flop circuit with a simple output logic
dc.typearticle
dc.identifier.doihttps://doi.org/10.1007/s00034-011-9343-4
dc.rights.accessAcceso Abierto


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